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Add an optimized rsqrt implementation for SSE-enabled builds.
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+35
-2
@@ -12064,6 +12064,40 @@ static MA_INLINE double ma_sqrtd(double x)
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}
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static MA_INLINE float ma_rsqrtf(float x)
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{
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#if defined(MA_SUPPORT_SSE2) && !defined(MA_NO_SSE2) && (defined(MA_X64) || (defined(_M_IX86_FP) && _M_IX86_FP == 2) || defined(__SSE2__))
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{
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/*
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For SSE we can use RSQRTSS.
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This Stack Overflow post suggests that compilers don't necessarily generate optimal code
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when using intrinsics:
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https://web.archive.org/web/20221211012522/https://stackoverflow.com/questions/32687079/getting-fewest-instructions-for-rsqrtss-wrapper
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I'm going to do something similar here, but a bit simpler.
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*/
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#if defined(__GNUC__) || defined(__clang__)
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{
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float result;
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__asm__ __volatile__("rsqrtss %1, %0" : "=x"(result) : "x"(x));
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return result;
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}
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#else
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{
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return _mm_cvtss_f32(_mm_rsqrt_ss(_mm_set_ps1(x)));
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}
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#endif
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}
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#else
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{
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return 1 / (float)ma_sqrtd(x);
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}
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#endif
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}
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static MA_INLINE float ma_sinf(float x)
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{
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return (float)ma_sind((float)x);
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@@ -48579,8 +48613,7 @@ MA_API ma_vec3f ma_vec3f_normalize(ma_vec3f v)
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return ma_vec3f_init_3f(0, 0, 0);
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}
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invLen = 1 / (float)ma_sqrtd(len2); /* TODO: Change this to a fast invese sqrt. Use rsqrtss with SSE enabled hardware. */
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invLen = ma_rsqrtf(len2);
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v.x *= invLen;
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v.y *= invLen;
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v.z *= invLen;
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