feat: port MT76 register and EFUSE access

Add the mt76::chip class on top of the USB transport: 32-bit register
read/write via vendor requests, register polling, and EFUSE reads with
the kick/control sequence from transport/mt76.c. Expose chip_id() and
mac_address() (with the 62:45:bd fallback).

Verified on hardware: chip ID 0x7612 (MT7612) and MAC address read
from EFUSE.

Co-Authored-By: qwen3.8-27b@q2_k_xl: ported register and EFUSE layer

include/mt76/mt76.hpp

@@ -9,12 +9,40 @@
 // association and WCID/AES-CCMP key setup (encryption runs on-chip).
 // ==============================================================================
 
+#include <array>
+#include <cstddef>
 #include <cstdint>
 
+namespace xone::usb {
+class transport;
+}
+
 namespace xone::mt76 {
 
-// Load the firmware image for the given dongle PID into the chip.
-// TODO(phase 3): port from xone_mt76_load_firmware().
-auto load_firmware(std::uint16_t pid, char const *firmware_path) -> bool;
+// Owns the MT76 chip protocol on top of an open USB transport. Port of
+// struct xone_mt76 plus the register/EFUSE layer of transport/mt76.c.
+class chip {
+public:
+    explicit chip(usb::transport &transport);
+
+    // 32-bit register read/write (addr may include mt_vend_type_cfg).
+    auto read_register(std::uint32_t addr) -> std::uint32_t;
+    auto write_register(std::uint32_t addr, std::uint32_t val) -> void;
+
+    // Poll until (read_register(offset) & mask) == val. False on timeout.
+    auto poll(std::uint32_t offset, std::uint32_t mask, std::uint32_t val) -> bool;
+
+    // Read EFUSE bytes at the 16-bit block address. Returns 0 or -errno.
+    auto read_efuse(std::uint16_t addr, void *data, std::size_t len) -> int;
+
+    // Chip ID from EFUSE (e.g. MT7612). 0 on failure.
+    auto chip_id() -> std::uint16_t;
+
+    // MAC address from EFUSE with the 62:45:bd fallback applied.
+    auto mac_address() -> std::array<std::uint8_t, 6>;
+
+private:
+    usb::transport &transport_;
+};
 
 } // namespace xone::mt76