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Fix some issues with CPUID.
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@@ -2724,9 +2724,23 @@ mal_uint64 mal_sine_wave_read(mal_sine_wave* pSignWave, mal_uint64 count, float*
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#elif (defined(__GNUC__) || defined(__clang__)) && !defined(MAL_ANDROID)
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#elif (defined(__GNUC__) || defined(__clang__)) && !defined(MAL_ANDROID)
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static MAL_INLINE void mal_cpuid(int info[4], int fid)
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static MAL_INLINE void mal_cpuid(int info[4], int fid)
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{
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{
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__asm__ __volatile__ (
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// It looks like the -fPIC option uses the ebx register which GCC complains about. We can work around this by just using a different register, the
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"cpuid" : "=a"(info[0]), "=b"(info[1]), "=c"(info[2]), "=d"(info[3]) : "a"(fid), "c"(0)
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// specific register of which I'm letting the compiler decide on. The "k" prefix is used to specify a 32-bit register. The {...} syntax is for
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);
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// supporting different assembly dialects.
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//
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// What's basically happening is that we're saving and restoring the ebx register manually.
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#if defined(DRFLAC_X86) && defined(__PIC__)
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__asm__ __volatile__ (
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"xchg{l} {%%}ebx, %k1;"
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"cpuid;"
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"xchg{l} {%%}ebx, %k1;"
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: "=a"(info[0]), "=&r"(info[1]), "=c"(info[2]), "=d"(info[3]) : "a"(fid), "c"(0)
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);
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#else
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__asm__ __volatile__ (
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"cpuid" : "=a"(info[0]), "=b"(info[1]), "=c"(info[2]), "=d"(info[3]) : "a"(fid), "c"(0)
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);
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#endif
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}
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}
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static MAL_INLINE unsigned long long mal_xgetbv(int reg)
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static MAL_INLINE unsigned long long mal_xgetbv(int reg)
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